The Joint Test Action Group (JTAG) is an electronics industry association formed for developing a method of verifying designs and testing printed circuit boards after manufacture. The Institute of Electrical and Electronics Engineers (IEEE) codified the results of the effort in IEEE Standard 1149.1-1990, entitled Standard Test Access Port and Boundary-Scan Architecture.
JTAG functionalities in a system-on-a-chip (SOC) is used extensively for testing and debugging the SOC. A testing arrangement external to the SOC can gain critical information about the SOC (e.g., information about how the SOC runs, internal structure of the SOC, internal codes programmed within the SOC, etc.) by testing the SOC using the JTAG functionalities of the SOC. However, a manufacturer of a SOC may not intend that an unauthorized third party access such critical information about the SOC. Similarly, a manufacturer of a SOC may not intend that an unauthorized third party configure various critical parameters of the SOC.